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3-4 Screen Presentation Copyright © 2000 Hewlett-Packard Co.
Ski IA-64 Simulator Reference Manual 1.0L
3.2.4 The System Registers Pane
The system registers pane shows the Processor Status Register (psr), Control Registers, Region Registers (rr0-rr7), Pro-
tection Key Registers (pkr0-pkr15), Data Breakpoint Registers (dbr0-dbr15), Instruction Breakpoint Registers (ibr0-
ibr15), and Performance Monitor Configuration Registers (pmc0-pmc15), in hexadecimal. Application programs have
limited access to these registers. Addresses are displayed symbolically when possible. Symbolic displays are limited to
sixteen characters; when more than sixteen characters are needed, the first fifteen are displayed and an asterisk (“*”) is
added to indicate that the symbolic display has been abbreviated. The iva register shown on the second text line in
Figure 3-5 is an example of this.
3.2.5 The IA-32 Registers Pane
The IA-32 registers pane shows IA-32 registers in hexadecimal. For bit-encoded registers, the bits are named individually
using their IA-32 mnemonics. If a name is displayed in uppercase, the corresponding bit is currently set, and if the name is
displayed in lowercase, the bit is currently clear, as shown in Figure 3-6.
Figure 3-4. The
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Floating Point Registers Pane
Figure 3-5. The
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System Registers Pane