52
4 BIOS Overview
Order in Which the POST Tests are Performed
3Dh Load alternate registers with CMOS values
40h Set initial CPU speed
42h Initialize interrupt vectors
44h Initialize BIOS interrupts
45h POST device initialization
47h Initialize manager for PCI Option ROMs (Rel. 5.1 and earlier)
48h Check video configuration against CMOS
49h Initialize PCI bus and devices
4Ah Initialize all video adapters in system
4Bh Display QuietBoot screen
4Ch Shadow video BIOS ROM
4Eh Display BIOS copyright notice
50h Display CPU type
51h Initialize EISA board
52h Test keyboard
54h Set key click if enabled
56h Enable keyboard
59h Initialize POST display service
5Ah Display prompt “Press F2 to enter SETUP”
5Bh Disable CPU cache
5Ch Test RAM between 512 and 640 KB
60h Test extended memory
62h Test extended memory address lines
64h JumptoUserPatch1
66h Configure advanced cache registers
Checkpoint
Code
POST Routine Description