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The Cache Switch Provides Non-blocking Switched Access to Cache
At the heart of the Lightning 9900 V Series are four Cache Switches (CSWs).
Together, these four switches (in the Lightning 9980V
™
system) use a parallel switch fabric
bus (PSFB). The CSW is a specially designed crossbar switch that functions as a
combination MUX, path arbitrator, and non-blocking network switch. The CSW functions
as a MUX by supporting eight paths into the processor side of each switch and eight paths
to the cache modules. All total, there are 32 paths at the processor side of the fabric
network and 32 paths to the cache modules from the cache side of the fabric network.
The Lightning 9980V System Provides 64GB of Fully Addressable Cache
The Lightning 9980V system supports up to 64GB of data cache, all directly
addressable. Separate cache modules (up to 3.0GB) are used for control storage.
Competitive systems use their cache for both data and control information, limiting the
amount of usable data cache and creating performance limitations for certain workloads.
Advanced Cache Algorithms of the Lightning 9900 V Series
The Lightning 9900 V Series has a variety of advanced cache algorithms and software
solutions that provide exceptional performance.
Hitachi FlashAccess
™
S o f t w a r e Allows Data Sets to be Permanently Placed
in Cache
Hitachi FlashAccess software allows users to dynamically “lock and unlock” data into
cache in real time. Read and write functions are then performed at cache speeds, with no
disk latency delay. FlashAccess software, a portion of cache memory can be allocated to
specific data. Administrators can add, delete, or change FlashAccess software managed data
at any time, quickly and easily.
In IBM
®
S/390
®
environments defined by the Logical Volume Image (LVI), cache data
can be as small as a single track or as large as a full 3390. For increased configuration
flexibility, FlashAccess software offers multiple modes of operation. It can be used in
conjunction with Hitachi RapidXchange
™
software to increase the speed of data transfer
and, therefore, improve performance of mainframes to open systems data exchange.
RapidXchange software supports both open-to-S/390 and open-to-open high-speed data
transfers.
Read-ahead for High-performance Sequential Reads
Read clustering in the Lightning 9900 V Series is enabled using built-in heuristics to
read ahead for every I/O. The heuristics are applied to determine if the data is being
accessed sequentially. If so, then the Lightning 9900 V Series reads ahead pages
corresponding to that data. Read-ahead helps to ensure that when a client read request is
received the requested data will already be stored in the data cache, so the request can be
satisfied immediately.
C o n t rol Memory Hierarchical Star Network
The second component of the Hi-Star architecture is the Control Memory Hierarchical
Star Network (CM-HSN). This is a point-to-point network that handles the exchange of
control information between the processors and control memory. The control memory
contains information about the status, location, and configuration of the cache, the data in
the cache, and the configuration of the Lightning 9900 V Series system (as well as other
information related to the operational state of the system). Two control memory areas are
The CSW is at the heart
of the Lightning 9900 V
Series.
Hitachi Data Sy s t e m s
18
A portion of cache
memory can be allocated
to specific data.