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CHAPTER 12 INTERRUPT FUNCTION
12.4.3 Software interrupt request acknowledge operation
A software interrupt request is acknowledged by BRK instruction execution. Software interrupt cannot be disabled.
If a software interrupt request is acknowledged, the contents are saved to the stack in the order of first, program
status word (PSW), then the program counter (PC), then the IE flag is reset (0) and the contents of the vector tables
(003EH, 003FH) are loaded into the PC and branched.
Return from the software interrupt is possible with the RETB instruction.
Caution Do not use the RETI instruction for returning from the software interrupt.
12.4.4 Multiple interrupt servicing
When another interrupt is acknowledged while an interrupt is being processed, this is called multiple interrupt.
Multiple interrupts are not generated unless interrupt request acknowledge is enabled (IE = 1) (non-maskable
interrupts excepted). Also, at the point when an interrupt request is acknowledged, acknowledgment of other interrupt
requests is disabled (IE = 0).Therefore, in order to enable multiple interrupts, it is necessary during interrupt processing
to set the IE flag (1) using the IE instruction, and enable interrupts.
There are cases where multiple requests are not enabled even though interrupts are enabled. However, this is
controlled by the priority of the interrupt. There are two interrupt priorities, the default priority and the programmable
priority. Multiple interrupt control is handled by programmable priority control.
In interrupt enabled condition, when an interrupt request is generated which is the same level, or which has a higher
priority than the interrupt currently being processed, it is acknowledged as a multiple interrupt. When an interrupt
request is generated which has a lower priority than the interrupt currently being processed, it is not acknowledged
as a multiple interrupt.
Interrupt requests which have not been permitted as multiple interrupts because of low priority or because of the
interrupt being disabled, are reserved, and after the current interrupt processing has been completed, they are
acknowledged after executing one of the main processing instructions.
Multiple interrupts are not permitted during non-maskable interrupt processing.
Multiple interrupt enabled interrupt requests are shown in Table 12-4, and an example of multiple interrupts is given
in Figure 12-14 .