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3.18 Watchdog Timer
Once the Enable cycle is active, a Refresh cycle is requested before
the time-out period. This restarts counting of the WDT period. When
the time counting goes over the period preset of WDT, it will assume
that the program operation is abnormal. A System Reset signal will
re-start when such error happens.
The following sample programs show how to Enable, Disable and
Refresh the Watchdog Timer:
;----------------------------------------------------------------------
; Enter the extended function mode, interruptible double-write
;----------------------------------------------------------------------
MOV DX, 4EH
MOV AL, 87H
OUT DX, AL
OUT DX, AL
;----------------------------------------------------------------------
; Configurate logical device 8, configuration register CRF30
;---------------------------------------------------------------------
MOV DX, 4EH
MOV AL, 07H
OUT DX, AL ; point to Logical Device Number Reg.
MOV DX, 4FH
MOV AL, 08H
OUT DX, AL ; select logical device 8
MOV DX, 4EH
MOV AL, 30H
OUT DX, AL ; select CRF30
MOV DX, 4FH
MOV AL, 01H
OUT DX, AL ; update CRF30 with value 01H
MOV DX, 4EH
MOV AL, F3H
OUT DX, AL ; select CRF3 (select WDTO count mode)
MOV DX, 4FH
MOV AL, 00H
OUT DX, AL ; update CRF3 with value 00H (bit 2:0=second; 1=minute)
MOV DX, 4EH
MOV AL, F4H
OUT DX, AL ; select CRF4 (WDTO Time-out value)
MOV DX, 4FH
MOV AL, 05H
OUT DX, AL ; update CRF4 with value 05H
Bit[7:0] = 00 Time-out Disabled
01 Time-out occurs after 1 second/minute
02 Time-out occurs after 2 second/minute
.
.
ff Time-out occurs after 255 second/minute