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Appendix A Specifications for VXI-MXI-2
© National Instruments Corporation A-5 PCI-MXI-2 for Linux
D32, D16, D08(EO) (slave)................... VMEbus slave D32, D16, and
D08 data sizes
BLT, MBLT (master).............................VMEbus master block and
D64 transfers
BLT, MBLT (slave) ...............................VMEbus slave block and
D64 transfers
RMW (master) ....................................... VMEbus master
read/modify/write transfers
RMW (slave)..........................................VMEbus slave read/modify/write
transfers
RETRY (master) ....................................VMEbus master retry support
RETRY (slave).......................................VMEbus slave retry support
FSD ........................................................First slot detector
SCON.....................................................VMEbus System Controller
PRI, RRS................................................Prioritized or Round-Robin
Select arbiter
ROR, FAIR ............................................ Release on Request and
FAIR bus requester
IH(7–1)................................................... Interrupt handler for levels 7–1
I(7–1)......................................................Interrupt requester for levels 7–1
D32, D16, D08(O)
(Interrupt Handler)................................. VMEbus D32, D16, D08(O)
interrupt handler
D32, D16, D08(O) (Interrupter)............. VMEbus D32, D16, D08(O)
interrupter
ROAK, RORA ....................................... Release on Acknowledge or
Register Access interrupter
BTO(x) ...................................................VMEbus bus timer
(programmable limit)