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Table 2.12 Measurement Items
Classification Type Measurement Item Option Note
Disabled None Not measured.
CPU
performance
Cycle Elapsed cycles AC Except for power-on period;
counted by the CPU clock.
Cycles executed in
privileged mode
PM The number of privileged-
mode cycles among the
number of elapsed cycles.
Cycles for asserting
the SR.BL bit
BL The number of cycles when
the SR.BL bit = 1 among the
number of elapsed cycles.
Instruction Number of effective
instructions issued
I The number of execution
instructions = number of valid
instructions issued + number
of cases of simultaneous
execution of two instructions.
The number of valid
instructions means the
number of completed
instructions.
Number of 2
instruction executed
simultaneously
2I The number of times that two
instructions are executed
simultaneously among the
valid instructions issued.
Branch Number of
unconditional branch
BT The number of unconditional
branches other than branches
occurring after an exception.
However, RTE is counted.
Exception,
interruption
Number of
exceptions accepted
EA Interrupts are included.
Number of interrupts
accepted
INT NMI is included.
Number of UBC
channel hit
UBC Performs OR to count the
number of channel-hits in the
CPU.