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value after setting. When no ASID value is specified, the BREAKPOINT is set to a virtual
address corresponding to the ASID value at command input.
12. An address (physical address) to which a BREAKPOINT is set is determined when the
BREAKPOINT is set. Accordingly, even if the VP_MAP table is modified after
BREAKPOINT setting, the BREAKPOINT address remains unchanged. When a
BREAKPOINT is satisfied with the modified address in the VP_MAP table, the cause of
termination displayed in the status bar and the [Output] window is ILLEGAL INSTRUCTION,
not BREAKPOINT.
13. If an address of a BREAKPOINT cannot be correctly set in the ROM or flash memory area, a
mark z will be displayed in the [BP] area of the address on the [Editor] or [Disassembly]
window by refreshing the [Memory] window, etc. after Go execution. However, no break will
occur at this address. When the program halts with the break condition, the mark z
disappears.
2.2.6 Notes on Setting the [Break Condition] Dialog Box and the BREAKCONDITION_
SET Command
1. When [Step In], [Step Over], or [Step Out] is selected, the settings of Break Condition 2 are
disabled.
2. Break Condition 2 is disabled when an instruction to which a BREAKPOINT has been set is
executed. Accordingly, do not set a BREAKPOINT to an instruction which satisfies Break
Condition 2.
3. When a Break Condition is satisfied, emulation may stop after two or more instructions have
been executed.
4. If a PC break address condition is set to the slot instruction after a delayed branch instruction,
user program execution cannot be terminated before the slot instruction execution; execution
stops before the branch destination instruction.
5. Break Condition 1,2 is used as the measurement range in the performance measurement
function when [PA-1 start point] and [PA-1 end point] are displayed on the [Action] part in the
[Break condition] sheet of the [Event] window. This applies when the Break Condition is
displayed with the BREAKCONDITION_DISPLAY command in the command-line function.
In this case, a break does not occur when Break Condition 1,2 is satisfied.
6. Note that a break occurs with a break satisfaction condition by an instruction that has been
cancelled due to the generation of an exception.
7. Use the sequential break or count break with the L-bus condition. If such break is used with
the I-bus condition, it will not operate correctly.
8. A break will not occur with the execution counts specified on the execution of the multi-step
instruction.