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WA_DEV_W218_PTS_002 Rev 005 Page 40 of 109
Product Technical Specification &
Customer Design Guidelines
Application
The level shifter must be a V28 electrical signal compliant with 2.8V.
Figure 7. Example of RS-232 Level Shifter Implementation for UART
Note that the U1 chip also protects the WISMO218 against ESD (Air Discharge) at 15KV.
Table 8. Recommended Components
Component
Description/Details
Manufacturer
R1, R2
15K
C1, C2, C3, C4, C5
1µF
C6
100nF
C7
6.8uF TANTAL 10V CP32136
AVX
U1
ADM3307EACP
ANALOG DEVICES
J1
SUB-D9 female
R1 and R2 are necessary only during Reset state to force the ~CT125/RI and ~CT109/DCD signals to
HIGH level.
The ADM3307EACP can be powered by the VCC_2V8 (pin 46) of the WISMO218 or by an external
regulator at 2.8V.
If the UART interface is connected directly to a host processor, it is not necessary to use level shifters.
The interface can be connected as shown in the figure(s) below: