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50 Appendix
Advanced chipset control submenu
Use this screen to fine tine the chipset.
Feature Option Description
Integrated Device
Control Sub-Menu
submenu
Integrated LAN 1 submenu
Integrated LAN 2 submenu
Spectrum Spread
Force Compliance
Mode Entry
Enabled
Disabled
Set PCI-E compliance mode
DRAM Data Integ-
rity Mode
Disabled
72-bit ECC
144-bit ECC
Auto
Set ECC mode for ECC memory mod-
ules
ECC Error Type None / NMI /
SMI / SCI
Set the type of interrupt generated
when an ECC error occurs
SERR Signal Con-
dition
None
Single bit
Multiple bit
Both
Set the error conditions on which
SERR is sent