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ELECTRICAL SPECIFICATION SSD-DXXX(I)-4300 DATA SHEET
SILICONSYSTEMS PROPRIETARY
This document and the information contained within it is confidential and proprietary to SiliconSystems, Inc.
All unauthorized use and/or reproduction is prohibited.
4300D-00DSR PAGE 18 FEBRUARY 27, 2009
Figure 7: Sustained UDMA Data-In Burst
Note: DD(15:0) and DSTROBE signals are shown at both the host and the
device to emphasize that the cable settling time as well as cable
propagation delay does not allow the data signals to be considered stable
at the host until some time after they are driven by the device.
Figure 8: Host Pausing a UDMA Data-In Burst
Notes:
1. The host may assert STOP to request termination of the UDMA burst
no sooner than t
RP
after HDMARDY- is negated.
2. If the t
SR
timing is not satisfied, the host may receive zero, one, or two
more data words from the device.
t
DVH
DSTROBE
at device
DD(15:0)
at device
DSTROBE
at host
DD(15:0)
at host
t
DVH
t
CYC
t
CYC
t
DVS
t
DVS
t
DH
t
DS
t
DH
t
DS
t
2CYC
t
DH
t
DVH
t
2CYC
DMARQ
(device)
DMACK-
(host)
STOP
(host)
HDMARDY-
(host)
DSTROBE
(device)
DD(15:0)
(device)
t
SR
t
RFS
t
RP