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ATA COMMAND BLOCK AND SET DESCRIPTION SSD-DXXX(I)-4300 DATA SHEET
SILICONSYSTEMS PROPRIETARY
This document and the information contained within it is confidential and proprietary to SiliconSystems, Inc.
All unauthorized use and/or reproduction is prohibited.
4300D-00DSR PAGE 50 FEBRUARY 27, 2009
Idle Immediate — 95h, E1h
When issued by the host, the device’s internal controller sets the BSY bit,
enters Idle Mode, clears the BSY bit, and issues an interrupt. The interrupt is
issued whether or not the Idle mode is fully entered.
Table 35: Idle Immediate — 95h, E1h
Register
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
Feature X
Sector Count X
Sector Number X
Cylinder Low X
Cylinder High X
Drive Head X X X Drive X
Command 95h or E1h