Silicon Laboratories SI5319 Clock User Manual


 
Si53xx-RM
Rev. 0.5 173
APPENDIX J—Si5374 AND Si5375 CROSSTALK
While the four DSPLLs of the Si5374 and Si5375 are in close physical and electrical proximity to one another,
crosstalk interference between the DSPLLs is minimal. The following measurements show typical performance
levels that can be expected for the Si5374 and Si5375 when all four of their DSPLLs are operating at frequencies
that are close in value to one another, but not exactly the same.
Si5374, Si5375 Crosstalk Test Bed
All four DSPLLs share the same frequency plan:
38.88 MHz input.
38.88 MHz x 4080 / 227 = 698.81 MHz output (rounded).
There are four slightly different input frequencies:
DSPLL A: 38.88 MHz + 0 ppm => 38.88000000 MHz
DSPLL B: 38.88 MHz + 1 ppm => 38.88003888 MHz
DSPLL C: 38.88 MHz + 10 ppm => 38.88038880 MHz
DSPLL D: 38.88 MHz + 20 ppm => 38.88077760 MHz
OSC_P, OSC_N Reference:
Si530 at 121.109 MHz
Test equipment:
Agilent E5052B
Table 83. Si5374/75 Crosstalk Jitter Values
DSPLL Jitter, fsec RMS
A334
B327
C358
D331