Sony ECM-3711 Network Router User Manual


 
ECM-3711 Series
16 ECM-3711 Series User’s Manual
2D Graphics Engine
The CN700 North Bridge's advanced 128-bit 2D graphics engine delivers high-speed 2D
acceleration for productivity applications. The enhanced 2D architecture with direct access
frame buffer capability optimizes UMA performance and provides acceleration of all color
depths. MPEG Video Playback The CN700 North Bridge provides the ideal architecture for
high quality MPEG-2 based video applications. For MPEG playback, the integrated video
accelerator offloads the CPU by performing the motion compensation tasks, while its
enhanced scaling algorithm delivers incredible full-screen video playback. The CN700
provides three “Digital Video Port” interfaces: FPDP, GDVP1, and DVP0. The Flat Panel
Display Port (FPDP) implements a 24-bit / dual 12-bit interface which is designed to drive a
Flat Panel Display via an external LVDS transmitter chip. The CN700 can be connected to
the external LVDS transmitter chip in either 24-bit or dual-12-bit modes. A wide variety of
LCD panels are supported including VGA, SVGA, XGA, SXGA+ and up to UXGA-resolution
TFT color panels, in either SDR (1 pixel / clock) or DDR (2 pixels / clock) modes. Two 12-bit
“Display Port” interfaces are provided (through multiplexing with AGP interface) plus a
dedicated 12-bit display port interface. Multiplexing display functions with the AGP bus
allows embedded systems to support an external AGP connector for future performance
upgrade through the external graphics controller. It also allows add-in cards to be designed
with an AGP-compatible connector for implementing the display interface logic to reduce
cost in the base (CRT-only) configuration. In the value system configurations, the external
AGP upgrade capability is not normally required by the system, allowing all the AGP pins to
be used for implementing very flexible display functions.
Internally the CN700 North Bridge provides two separate display engines, so if two display
devices are connected, each can display completely different information at different
resolutions, pixel depths and refresh rates. If more than two display devices are connected,
the additional displays must have the same resolution, pixel depth and refresh rate as one
of the first two. The maximum display resolutions supported for one display device are
listed in the table below. If more than one display is implemented (i.e., if both display
engines are functioning at the same time), then available memory bandwidth may limit the
display resolutions supported on one or both displays. This will be dependent on many
factors including primarily clock rates and memory speeds (contact VIA for additional
information).