Filter
Top Products
USB 2.0 Hi-Speed 2-Port Hub Controller
Datasheet
Revision 1.96 (07-11-08) 28 SMSC USB2512A
DATASHEET
4.6.2 External Hardware RESET_N
A valid hardware reset is defined as assertion of RESET_N for a minimum of 1us after all power
supplies are within operating range. While reset is asserted, the Hub (and its associated external
circuitry) consumes less than 500μA of current from the upstream USB power source.
Assertion of RESET_N (external pin) causes the following:
1. All downstream ports are disabled, and PRTPWR power to downstream devices is removed.
2. The PHYs are disabled, and the differential pairs will be in a high-impedance state.
3. All transactions immediately terminate; no states are saved.
4. All internal registers return to the default state (in most cases, 00(h)).
5. The external crystal oscillator is halted.
6. The PLL is halted.
The Hub is “operational” 500μs after RESET_N is negated.
Once operational, the Hub immediately reads OEM-specific data from the external EEPROM (if the
SMBus option is not disabled).
4.6.2.1 RESET_N for Strapping Option Configuration
Figure 4.3 Reset_N Timing for Default/Strap Option Mode
Table 4.3 Reset_N Timing for Default/Strap Option Mode
NAME DESCRIPTION MIN TYP MAX UNITS
t1 RESET_N Asserted. 1 μsec
t2 Strap Setup Time 16.7 nsec
t3 Strap Hold Time. 16.7 1400 nsec
t4 hub outputs driven to inactive logic states 1.5 2 μsec
t5 USB Attach (See Note). 100 msec
t6 Host acknowledges attach and signals USB
Reset.
100 msec
t1
t4
t5 t6
t7 t8
Valid
Don’t Care
Don’t Care
Driven by Hub if strap is an output.
RESET_N
VSS
Strap Pins
VSS
Hardware
reset
asserted
Read Strap
Options
Drive Strap
Outputs to
inactive
levels
Attach
USB
Upstream
USB Reset
recovery
Idle
Start
completion
request
response
t2
t3