SUPER MICRO Computer X8DT6 Network Router User Manual


 
Chapter 4: AMI BIOS
4-9
Demand Scrubbing
This is a memory error-correction scheme which will allow the processor to write
correct data back into the memory block from where it was read by the processor.
The options are Enabled and Disabled.
Patrol Scrubbing
This is a memory error-correction scheme working in the background looking for
and correcting resident errors. The options are Enabled and Disabled.
Throttling - Closed Loop
Throttling improves CPU's reliability and power ef ciency via automatic voltage
control during idle states. The options are Enabled and Disabled.
North Bridge Con guration
This feature allows the user to con gure the settings for the North Bridge chip.
Intel I/OAT
The Intel I/OAT (I/O Acceleration Technology) signi cantly reduces CPU overhead
by leveraging CPU architectural improvements, freeing up resources for other tasks.
The options are Disabled and Enabled.
DCA Technology (Available when Intel I/OAT is enabled)
Select Enabled to use Intel's DCA (Direct Cache Access) Technology to enhance
data transfer ef ciency. The options are Enabled and Disabled.
DCA Prefetch Delay
A DCA Prefetch is used with TOE components to prefetch data to shorten execution
cycles and maximize data processing ef ciency. Prefetching too frequently can satu-
rate the cache directory and delay necessary cache access. This feature reduces
or increases the frequency the system prefetches data. The options are [8], [16],
[24], [32], [40], [48], [56], [64], [72], [80], [88], [96], [104], [112], [120].
IOH PCI-e Max. Payload Size
Some add-on cards perform faster when the payload size is limited to 128 Bytes;
while others, with a payload size of 256 Bytes. Please refer to your add-on card
user guide for the desired setting. The options are 256 Bytes and 128 Bytes.
Intel VT-d
Select Enabled to enable Intel Virtualization Technology support for Direct I/O VT-d
by reporting the I/O device assignments to VMM through the DMAR ACPI Tables.
This feature offers fully-protected I/O resource-sharing across the Intel platforms,