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1-7
PCI445X Device
CCLK can be slowed down rather than stopped by CCLKRUN. If CCLKRUN
is set, the CLKCTRLEN (CardBus socket 20h, bit 16) and CLKCTR (CardBus
socket 20h, bit 0) bits are both set to 1. The clock is slowed down to 1/16. In
this mode the PCI clock is not allowed to stop.
1.1.12.9 SMI
A PC card power change event can be reported to the system as SMI (IRQ2
or CSC). It can be controlled with the SMIROUTE, SMISTATUS, and SMIENB
bits (system control register, PCI offset 80h, bits 26, 25, and 24, respectively).
1.1.12.10 Socket Power Lock
Socket power can be protected from software control in the D3
hot
state. It can
be done with the socket power lock bit (device control register, PCI offset 92h,
bit 7).
1.1.12.11V
CC
Protection
The VCCPROT bit (system control register, PCI offset 80h, bit 21) controls V
CC
protection for 16-bit cards. This feature protects applying the wrong (higher)
V
CC
to the 16-bit card. If a 3.3-V-only card is inserted, then it protects against
applying 5 V to the card. Default is 0 (enabled).
1.1.12.12 ZV Port Control and Auto Detect Function
Internal zoomed video buffers can be controlled with the ZV autodetect
function. It can be turned on by setting the zoomed video autodetect bit
(multimedia control register, PCI offset 84h, bit 5) to 1. Autodetect priority
encoding bits (multimedia control register, PCI offset 84h, bits 4–2) can control
the priority scheme.