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System Implementation
1-11
PCI445X Device
Table 1–1.Registers and Bits Loadable Through Serial EEPROM
Register Offset Register Bits Loaded From
EEPROM
The following are configuration registers for the OHCI function (function 2)
PCI register (2Ch) PCI subsystem ID 15–0
PCI register (2Dh) PCI vendor ID 15–0
PCI register (3Eh) PCI maximum latency, minimum grant 11–8, 3–0
PCI register (F0h) PCI miscellaneous configuration 15, 13, 10, 3–0
PCI register (F4h) Link enhancements control 7, 2, 1
OHCI register (24h) 1394 global unique ID Hi 31–0
OHCI register (28h) 1394 global unique ID Lo 31–0
The following are configuration registers for PC Card functions (functions 0 and 1)
PCI register (40h) Subsystem vendor ID 15–0
PCI register (42h) Subsystem ID 15–0
PCI register (80h) System control 31–24, 22–14, 6–3, 1, 0
PCI register (86h) General control 3–0
PCI register (89h) General-purpose event enable 7, 6, 3–0
PCI register (8Bh) General-purpose output 3–0
PCI register (8Ch) Multifunction routing 30–28, 26–24, 22–20,
18–16, 14–12, 10–8,
6–4, 2–0
PCI register (91h) Card control 7, 6, 2–0
PCI register (92h) Device control 7, 6, 2–0
PCI register (93h) Diagnostic 7, 5, 0
PCI register (A2h) Power management capabilities 15
PCI register ExCA ID and revision 7–0