Filter
Top Products
www.ti.com
5.23ReceiveUnicastClearRegister(RXUNICASTCLEAR)
EMACPortRegisters
Thereceiveunicastclearregister(RXUNICASTCLEAR)isshowninFigure51anddescribedinTable51.
Figure51.ReceiveUnicastClearRegister(RXUNICASTCLEAR)
3116
Reserved
R-0
15876543210
ReservedRXCH7ENRXCH6ENRXCH5ENRXCH4ENRXCH3ENRXCH2ENRXCH1ENRXCH0EN
R-0R/WC-0R/WC-0R/WC-0R/WC-0R/WC-0R/WC-0R/WC-0R/WC-0
LEGEND:R=Readonly;R/W=Read/Write;R/WC=Read/Write1toclear;-n=valueafterreset
Table51.ReceiveUnicastClearRegister(RXUNICASTCLEAR)FieldDescriptions
BitFieldValueDescription
31-8Reserved0Reserved
7RXCH7ENReceivechannel7unicastenableclearbit.Write1tocleartheenable,awriteof0hasnoeffect.
6RXCH6ENReceivechannel6unicastenableclearbit.Write1tocleartheenable,awriteof0hasnoeffect.
5RXCH5ENReceivechannel5unicastenableclearbit.Write1tocleartheenable,awriteof0hasnoeffect.
4RXCH4ENReceivechannel4unicastenableclearbit.Write1tocleartheenable,awriteof0hasnoeffect.
3RXCH3ENReceivechannel3unicastenableclearbit.Write1tocleartheenable,awriteof0hasnoeffect.
2RXCH2ENReceivechannel2unicastenableclearbit.Write1tocleartheenable,awriteof0hasnoeffect.
1RXCH1ENReceivechannel1unicastenableclearbit.Write1tocleartheenable,awriteof0hasnoeffect.
0RXCH0ENReceivechannel0unicastenableclearbit.Write1tocleartheenable,awriteof0hasnoeffect.
SPRU975B–August2006EthernetMediaAccessController(EMAC)/ManagementDataInput/Output(MDIO)107
SubmitDocumentationFeedback