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5.14ReceiveInterruptStatus(Masked)Register(RXINTSTATMASKED)
EMACPortRegisters
Thereceiveinterruptstatus(Masked)register(RXINTSTATMASKED)isshowninFigure42and
describedinTable42.
Figure42.ReceiveInterruptStatus(Masked)Register(RXINTSTATMASKED)
3116
Reserved
R-0
15876543210
ReservedRX7RX6RX5RX4RX3RX2RX1RX0
PENDPENDPENDPENDPENDPENDPENDPEND
R-0R-0R-0R-0R-0R-0R-0R-0R-0
LEGEND:R=Readonly;-n=valueafterreset
Table42.ReceiveInterruptStatus(Masked)Register(RXINTSTATMASKED)FieldDescriptions
BitFieldValueDescription
31-8Reserved0Reserved
7RX7PENDRX7PENDmaskedinterruptread
6RX6PENDRX6PENDmaskedinterruptread
5RX5PENDRX5PENDmaskedinterruptread
4RX4PENDRX4PENDmaskedinterruptread
3RX3PENDRX3PENDmaskedinterruptread
2RX2PENDRX2PENDmaskedinterruptread
1RX1PENDRX1PENDmaskedinterruptread
0RX0PENDRX0PENDmaskedinterruptread
SPRU975B–August2006EthernetMediaAccessController(EMAC)/ManagementDataInput/Output(MDIO)97
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