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2.16.1.4HostErrorInterrupt
2.16.2MDIOModuleInterruptEventsandRequests
2.16.2.1LinkChangeInterrupt
2.16.2.2UserAccessCompletionInterrupt
EMACFunctionalArchitecture
Thehosterrorinterrupt(HOSTPEND)isissued,ifenabled,undererrorconditionsduetothehandlingof
bufferdescriptorsdetectedduringtransmitorreceiveDMAtransactions.Thefailureofthesoftware
applicationtosupplyproperlyformattedbufferdescriptorsresultsinthiserror.Theerrorbitcanonlybe
clearedbyresettingtheEMACmoduleinhardware.
ThehosterrorinterruptisenabledbysettingtheHOSTMASKbitintheMACINTMASKSETregister.The
hosterrorinterruptisdisabledbyclearingtheappropriatebitintheMACINTMASKCLEARregister.The
rawandmaskedhosterrorinterruptstatusmaybereadbyreadingtheMACINTSTATRAWand
MACINTSTATMASKEDregisters,respectively.
Transmithosterrorconditionsinclude:
•SOPerror
•OwnershipbitnotsetinSOPbuffer
•ZeronextbufferdescriptorpointerwithoutEOP
•Zerobufferpointer
•Zerobufferlength
•Packetlengtherror
Receivehosterrorconditionsinclude:
•Ownershipbitnotsetininputbuffer
•Zerobufferpointer
TheMDIOmodulegeneratestwointerruptevents,asfollows:
•LINKINT:Serialinterfacelinkchangeinterrupt.IndicatesachangeinthestateofthePHYlink.
•USERINT:Serialinterfaceusercommandeventcompleteinterrupt.
TheMDIOmoduleassertsalinkchangeinterrupt(LINKINT)ifthereisachangeinthelinkstateofthe
PHYcorrespondingtotheaddressinthePHYADRMONbitsintheUSERPHYSELnregister,andifthe
LINKINTENBbitisalsosetinUSERPHYSELn.ThisinterrupteventisalsocapturedintheLINKINTRAW
bitsoftheLINKINTRAWregister.TheLINKINTRAWbits0and1correspondtoUSERPHYSEL0and
USERPHYSEL1,respectively.
Whentheinterruptisenabledandgenerated,thecorrespondingbitisalsosetintheLINKINTMASKED
register.TheinterruptisclearedbywritingbackthesamebittoLINKINTMASKED(writetoclear).
Auseraccesscompletioninterrupt(USERINT)isassertedwhentheGObitinoneoftheUSERACCESSn
registerstransitionsfrom1to0(indicatingcompletionofauseraccess)andthebitinthe
USERINTMASKSETregistercorrespondingtoUSERACCESS0orUSERACCESS1isset.Thisinterrupt
eventisalsocapturedinbits0and1oftheUSERINTRAWregister.USERINTRAWbits0andbit1
correspondtoUSERACCESS0andUSERACCESS1,respectively.
Whentheinterruptisenabledandgenerated,thecorrespondingUSERINTMASKEDbitisalsosetinthe
USERINTMASKEDregister.TheinterruptisclearedbywritingbackthesamebittoUSERINTMASKED
(writetoclear).
EthernetMediaAccessController(EMAC)/ManagementDataInput/Output(MDIO) 62SPRU975B–August2006
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