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2.9MediaIndependentInterfaces
2.9.1DataReception
2.9.1.1ReceiveControl
2.9.1.2ReceiveInter-FrameInterval
2.9.1.3ReceiveFlowControl
EMACFunctionalArchitecture
TheEMACsupportsfourphysicalinterfacestoexternaldevices:MediaIndependentInterface(MII),
ReducedMediaIndependentInterface(RMII),GigabitMediaIndependentInterface(GMII),andReduced
GigabitMediaIndependentInterface(RGMII).ThephysicalinterfaceuseddependsontheMACSELpins.
Thebasicoperationofallfourinterfacesisthesame,withsomeminordifferences.
Thefollowingsectionsdiscusstheoperationoftheseinterfacesin10/100Mbpsmode(MII,RMII,GMII
andRGMII),and1000Mbpsmode(GMIIandRGMII).AnIEEE802.3compliantEthernetMACcontrols
theseinterfaces.
DatareceivedfromthePHYisinterpretedandoutputtotheEMACreceiveFIFO.Interpretationinvolves
detectionandremovalofthepreambleandstartofframedelimiter,extractionoftheaddressandframe
length,datahandling,errorcheckingandreporting,cyclicredundancychecking(CRC),andstatistics
controlsignalgeneration.Receiveaddressdetectionandframefilteringoftheframesthatdonot
address-matchisperformedoutsidetheMediaIndependentinterface.
The802.3requiredinter-packetgap(IPG)is24receivedataclocks(96bittimes).However,theEMAC
cantolerateareducedIPG(2receiveclocksin10/100Mbpsmodeand5receiveclocksin1000Mbps
mode)withacorrectpreambleandstartframedelimiter.Thisintervalbetweenframesmustcomprise(in
thefollowingorder):
1.AnInter-PacketGap(IPG).
2.Asevenbytespreamble(allbytes55h).
3.Aonebytestartofframedelimiter(5Dh).
Whenenabledandtriggered,receiveflowcontrolisinitiatedtolimittheEMACfromfurtherframe
reception.TwoformsofreceiveflowcontrolareimplementedontheC645xdevice:
•Receivebufferflowcontrol
•ReceiveFIFOflowcontrol
Whenenabledandtriggered,receivebufferflowcontrolpreventsfurtherframereceptionbasedonthe
numberoffreebuffersavailable.Receivebufferflowcontrolissuesflowcontrolcollisionsinhalf-duplex
modeandIEEE802.3Xpauseframesforfull-duplexmode.
Receivebufferflowcontrolistriggeredwhenthenumberoffreebuffersinanyenabledreceivechannel
(RXnFREEBUFFER)islessthanorequaltothechannelflowcontrolthresholdregister
(RXnFLOWTHRESH)value.ReceiveflowcontrolisindependentofreceiveQOS,exceptthatbothusethe
freebuffervalues.
Whenenabledandtriggered,receiveFIFOflowcontrolpreventsfurtherframereceptionbasedonthe
numberofcellscurrentlyinthereceiveFIFO.ReceiveFIFOflowcontrolmaybeenabledonlyin
full-duplexmode(FULLDUPLEXbitissetintheMACCONTROLregister).Receiveflowcontrolprevents
receptionofframesontheportuntilallofthetriggeringconditionsclear,atwhichtimeframesmayagain
bereceivedbytheport.
ReceiveFIFOflowcontrolistriggeredwhentheoccupancyoftheFIFOisgreaterthanorequaltothe
RXFIFOFLOWTHRESHvalueintheFIFOCONTROLregister.TheRXFIFOFLOWTHRESHvaluemustbe
greaterthanorequalto1handlessthanorequalto42h(decimal66).TheRXFIFOFLOWTHRESHreset
valueis2h.
ReceiveflowcontrolisenabledbytheRXBUFFERFLOWENbitandtheRXFIFOFLOWENbitinthe
MACCONTROLregister.TheFULLDUPLEXbitintheMACCONTROLregisterconfigurestheEMACfor
collisionorIEEE802.3Xflowcontrol.
EthernetMediaAccessController(EMAC)/ManagementDataInput/Output(MDIO) 46SPRU975B–August2006
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