Filter
Top Products
Chapter 4 Award BIOS Setup 43
DRAM Timing Configuration
This field lets you select system memory timing data. Manual and BY
SPD are two options. Default is "BY SPD"
CAS Latency Time
When synchronous DRAM is installed, the number of clock cycles of
CAS latency depends on the DRAM timing. The settings are: 1.5, 2
and 2.5.
Active to Precharge Delay
This field let you select the active to precharge delay. The settings are:
7, 6 and 5
DRAM RAS# to CAS# Delay
This field is used to insert a timing delay between the CAS and RAS
strobe signals, used when DRAM is written to, read from, or refreshed.
Fast gives faster performance; and Slow gives more stable perfor-
mance. This field applies only when synchronous DRAM have been
installed in the system. The settings are: 2 and 3.
DRAM RAS# Precharge
If an insufficient number of cycles is allowed for the RAS to accumu-
late its charge before DRAM refresh, the refresh may be incomplete
and the DRAM may fail to retain data. Fast gives faster performance;
and Slow gives more stable performance. This field applies only when
synchronous DRAM is installed in the system. The settings are: 2 and
3.
Memory Frequency For
User can select 3 options: DDR200, DDR266, Auto (Default)