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Probe OUT connector can be connected down
stream to either a Hub or device or it can be
left unconnected.
4. Turn on the logic analyzer so that the VCC and
READY LEDs on the USB Analysis Probe are
lit. NOTE: Connect the USB Analysis Probe
to the USB wire as described in step 2 prior
to powering up the logic analyzer.
5. Load the USB Analysis Probe software for the
appropriate logic analyzer
The logic analyzer is now ready for STATE analysis.
Acquiring Data
Touch RUN and as soon as there is activity on the
bus, the logic analyzer will begin to acquire data. The
analyzer will continue to acquire data and will display
the data when the analyzer memory is full, the trigger
specification is TRUE or when you touch STOP.
The logic analyzer will flash “Slow or Missing Clock” if
the USB Analysis Probe provided master clock signal
is not being detected by the logic analyzer. This will
occur if the USB is IDLE or in an extended suspend
state. To accurately determine the state of the USB
refer to the Timing analysis chapter in this manual.
Captured data is as shown in the following figure.
The following figure displays the state listing after
disassembly. The inverse assembler is constructed
so the mnemonic output closely resembles the actual
commands, status conditions, messages and phases
specified in the Universal Serial Bus specification.
Symbols on the PID variable have also been defined
to help aid in analysis. The non-disassembled state
listing displays USB mnemonics in addition to data.
All data, address, endpoint and frame number fields
are displayed in hex.
The
State Display
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