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P a g e 10
Address Map
REGISTER OFFSET FUNCTION TYPE
PMC4U_BASE 0X00 base control read/write
PMC4U_STAT 0X04 status read read
PMC4U_MSK 0X08 interrupt mask control read/write
PMC4U_SCC_IVEC 0X0C SCC interrupt vector read read
PMC4U_DIR_TERM 0X10 direction and termination control read/write
PMC4U_SW_IN 0X14 read user switch read
PMC4U_SCC_A_CNTL 0X18 SCC channel A control read/write
PMC4U_SCC_A_DATA 0X1C SCC channel A data read/write
PMC4U_SCC_B_CNTL 0X20 SCC channel B control read/write
PMC4U_SCC_B_DATA 0X24 SCC channel B data read/write
PMC4U_UART_A 0X40 UART A base offset read/write
PMC4U_UART_B 0X60 UART B base offset read/write
PMC4U_UART_C 0X80 UART C base offset read/write
PMC4U_UART_D 0XA0 UART D base offset read/write
PMC4U_IRUPT 0XE0 interrupt source read read
PMC4U_IRUPT_CLR 0XE0 interrupt write clear write
FIGURE 2 PMC-4U INTERNAL ADDRESS MAP
Each UART channel has a number of registers associated with it. These
register offsets and their general functions are given in figure 3. For
details of the bits and functions of each register consult the documentation
for the XR16C854.
The SCC also has a number of internal registers that are accessed in a
two-step process. First the register number is written to the control
address for the respective channel. Then an additional read or write to the
same control address is performed. This causes the data to be read from
or written to the desired register. At the end of this process the register
pointer is reset so that the next access is again to/from the base control
register. For a more complete description of this process, as well as
details of registers and their functions, see the user’s manual for the
Z85C30.
The address map provided is for the local decoding performed within the
PMC-4U. The addresses are all offsets from a base address. The carrier
board that the PMC is installed into provides the base address.
The VendorId = 0x10EE. The CardId = 0x0007. Current revision = 0x00