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REGISTER OFFSET FUNCTION
PMC4U_UART_DATA 0X00 UART read/write data
PMC4U_UART_IEN 0X04 UART write interrupt enable
PMC4U_UART_ISTAT 0X08 UART read interrupt status
PMC4U_UART_FCNTL 0X08 UART write FIFO control
PMC4U_UART_LCNTL 0X0C UART write line control
PMC4U_UART_MCNTL 0X10 UART write modem control
PMC4U_UART_LSTAT 0X14 UART read line status
PMC4U_UART_MSTAT 0X18 UART read modem status
PMC4U_UART_SPAD 0X1C UART read/write scratchpad
UART baud rate register defines (enabled when *LCNTL bit-7 = 1)
PMC4U_UART_DLL 0X00 UART read/write LSB divisor
PMC4U_UART_DLM 0X04 UART read/write MSB divisor
UART enhanced register offsets (enabled when *LCNTL = 0xbf)
PMC4U_UART_FTC 0X00 UART FIFO read count/write trigger level
PMC4U_UART_FEAT 0X04 UART write feature control
PMC4U_UART_ENF 0X08 UART read/write enhanced features
PMC4U_UART_XON1 0X10 UART read/write Xon-1 word
PMC4U_UART_XON2 0X14 UART read/write Xon-2 word
PMC4U_UART_XOFF1 0X18 UART read/write Xoff-1 word
PMC4U_UART_XOFF2 0X1C UART read/write Xoff-2 word
UART EMS registers (enabled when feature control bit-6 = 1)
PMC4U_UART_EMS 0X1C UART write enhanced mode select
FIGURE 3 PMC-4U UART ADDRESS MAP