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ASUS TUEG-VM User’s Manual62
4. BIOS SETUP
4. BIOS SETUP
Chip Configuration
SDRAM RAS Precharge Time
This controls the idle clocks after issuing a precharge command to the
SDRAM.
SDRAM Cycle Time (Tras, Trc) [7T, 9T]
This feature controls the number of SDRAM clocks used for SDRAM
parameters Tras and Trc. Tras specifies the minimum clocks required between
active command and precharge command. Trc specifies the minimum clocks
required between active command and re-active command. Configuration
options: [5T, 7T] [7T, 9T]
SDRAM Page Closing Policy [One Bank]
This feature controls that after a page miss whether the Graphics and Memory
Controller Hub (GMCH) will issue “precharge only the bank” or “precharge
all” command to a specific opened SDRAM bank. Configuration options:
[One Bank] [All Banks]
CPU Latency Timer [Enabled]
This controls the GMCH’s response to CPU deferrable cycles. Configuration
options: [Disabled] [Enabled]
Command Per Cycle [Enabled]
When onboard VGA is used, CPU can help to gain graphics performance by
increasing proper SDRAM cycles combinations. Configuration options:
[Enabled] [Disabled]
Video Memory Cache Mode [UC]
USWC (uncacheable, speculative write combining) is a new cache
technology for the video memory of the processor. It can greatly improve
the display speed by caching the display data. You must set this to UC
(uncacheable) if your display card does not support this feature, otherwise
the system may not boot. Configuration options: [UC] [USWC]
Graphics Window Size [64MB]
This feature allows you to select the size of mapped memory for AGP graphic
data. Configuration options: [64MB] [32MB]
Memory Hole At 15M-16M [Disabled]
This field allows you to reserve an address space for ISA devices that require
it. Configuration options: [Disabled] [Enabled]
PCI 2.1 Support [Enabled]
This function allows you to enable or disable PCI 2.1 features including
passive release and delayed transaction. Configuration options: [Disabled]
[Enabled]