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CBM-710/720 Service Manual
8
2. CPU Peripheral Circuits
1) CPU and ROM/RAM
The CPU M50734SP has a external memory type. Lower 8-bit address is fetched via the A0/D0 bus line by
the 8-bit latch LS373. The 128-KB ROM and 64-KB RAM are used for performing the backup operation for
power failure by the super capacitor. The ceramic oscillator is used as CPU clock and transmits 7.37 MHz.
Fig. 2-1 CPU and ROM/RAM Circuit
2) Initial Resetting and Power Failure Interrupt Circuit
The IC12 is an IC for generating the power failure interrupt signal and reset signal. When the power supply
voltage decreased due to power failure, etc. this IC performs the voltage inspection and stores all data in the
CPU buffer into RAM while printing.