Cypress CY7C64113C Computer Hardware User Manual


 
CY7C64013C
CY7C64113C
Document #: 38-08001 Rev. *B Page 47 of 51
Figure 24-1. Clock Timing
Figure 24-2. USB Data Signal Timing
Figure 24-3. HAPI Read by External Interface from USB Microcontroller
CLOCK
t
CYC
t
CL
t
CH
90%
10%
90%
10%
D
D+
t
r
t
r
OE (P2.5, input)
DATA (output)
STB
(P2.4, input)
DReadyPin (P2.3, output)
Internal Write
Internal Addr
Port0
D[23:0]
t
OED
t
OEZ
t
RD
t
OEDR
CS (P2.6, input)
Int
(Shown for DRDY Polarity=0)
Interrupt Generated
(Ready)
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