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16 EPSON S1C6200/6200A CORE CPU MANUAL
3 INSTRUCTION SET
3INSTRUCTION SET
This chapter describes the entire instruction set of the S1C6200/6200A Core CPU.
A subset is allocated to each device within the S1C62 Family according to the configuration of the device.
Therefore not all instructions are available in every device. The relevant information is in the technical
manual for each device.
The source format and a description of the assembler is in the series-specific cross assembler manuals.
The instruction set contains 109 instructions. Each instruction comprises of one 12-bit word.
3.1 Instruction Indices
Three index tables are used for easy reference instructions.
a. Index by function
The instructions are arranged by function.
1. Branch
2. System control
3. Flag operation
4. Stack operation
5. Index operation
6. Data transfer
7. Arithmetic and logical operation
b. Index in alphabetical order
The instructions are arranged in alphabetical order. Page number references are provided.
c. Index by operation code
The instructions are arranged in numerical order by operation code.