Epson S1C6200A Computer Hardware User Manual


 
Source Format:
Operation:
OP-Code:
Type:
Clock Cycles:
Flag:
Description:
Example:
Source Format:
Operation:
OP-Code:
Type:
Clock Cycles:
Flag:
Description:
Example:
MSB LSB
MSB LSB
C
Z
D
I
C
Z
D
I
S1C6200/6200A CORE CPU MANUAL EPSON 69
3 INSTRUCTION SET
PUSH XH Push XH onto stack
PUSH XH
SP' SP - 1, M(SP') XH
11111100 0 101 FC5H
VI
5
Not affected
Not affected
Not affected
Not affected
Decrements the stack pointer by 1 and loads the contents of XH, the four high-
order bits of XHL, into the data memory location addressed by SP.
PUSH XH
SP CC CB
Memory (CBH) 0000 1000
XH register 1000 1000
PUSH XL Push XL onto stack
PUSH XL
SP' SP - 1, M(SP') XL
11111100 0 110 FC6H
VI
5
Not affected
Not affected
Not affected
Not affected
Decrements the stack pointer by 1 and loads the contents of XL, the four low-order
bits of XHL, into the data memory location addressed by SP.
PUSH XL
SP D0 CF
Memory (CFH) 1111 0110
XL register 0110 0110
2
3
2
2
2
1
2
0
M(SP) =
= XH
2
0
2
1
2
2
2
3
2
3
2
2
2
1
2
0
M(SP) =
= XL
2
0
2
1
2
2
2
3