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© Copyright IBM Corp. 2000 53
Appendix C. IRQ and DMA channel assignments
The following tables list the interrupt request (IRQ) and direct memory access (DMA
channel assignments.
Table 36. IRQ channel assignments
IRQ System resource
NMI Critical system error
SMI System management interrupt - power management
0 Reserved (interval timer)
1 Reserved (keyboard)
2 Reserved, cascade interrupt from slave PIC
3COM2
4COM1
5 LPT2/audio (if present)
6 Diskette controller
7LPT1
8 Real-time clock
9ACPI
10 Available to user
11 Available to user
12 Mouse port
13 Reserved (math coprocessor)
14 Primary IDE (if present)
15 Secondary IDE (if present)