IBM PC 300PL Personal Computer User Manual


 
Appendix B. System address maps
PCI configuration space map
Figure 37 (Page 2 of 2). DMA I/O address map
Address (hex) Description Bits Byte pointer
00CA Channel 6, Transfer Count register 00–15 Yes
00CC Channel 7, Memory Address register 00–15 Yes
00CE Channel 7, Transfer Count register 00–15 Yes
00D0 Channels 4–7, Read Status/Write Command register 00–07
00D2 Channels 4–7, Write Request register 00–02
00D4 Channels 4–7, Write Single Mask register bit 00–02
00D6 Channels 4–7, Mode register (write) 00–07
00D8 Channels 4–7, Clear byte pointer (write) N/A
00DA Channels 4–7, Master clear (write)/temp (read) 00–07
00DC Channels 4–7, Clear Mask register (write) 00–03
00DE Channels 4–7, Write All Mask register bits 00–03
00DF Channels 5–7, 8- or 16-bit mode select 00–07
Bus number (hex) Device number
(hex)
Function number
(hex)
Description
00 00 00 Intel 84440BX (host bridge)
00 01 00 Intel 84440BX (PCI/AGP)
00 1E 0 Intel 82371AB Hub interface to PCI bridge
registers
00 1F 01 Intel 82371AB IDE bus master
00 1F 02 Intel 82371AB USB
00 1F 0 Intel 82371AB Interface bridge registers
00 1F 5 AC '97 audio controller
02 X 00 PCI connectors
2
Upper byte of memory address register.
Appendix B. System address maps
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