Filter
Top Products
Specification Update 51
BV104. EPT Violations May Report Bits 11:0 of Guest Linear Address
Incorrectly
Problem: If a memory access to a linear address requires the processor to update an accessed or
dirty flag in a paging-structure entry and if that update causes an EPT violation, the
processor should store the linear address into the “guest linear address” field in the
VMCS. Due to this erratum, the processor may store an incorrect value into bits 11:0 of
this field. (The processor correctly stores the guest-physical address of the paging-
structure entry into the “guest-physical address” field in the VMCS.)
Implication: Software may not be easily able to determine the page offset of the original memory
access that caused the EPT violation. Intel has not observed this erratum to impact the
operation of any commercially available software.
Workaround: Software requiring the page offset of the original memory access address can derive it by
simulating the effective address computation of
the instruction that caused the EPT
violation.
Status: For the steppings affected, see the Summary Tables of Changes.
BV105. IA32_VMX_VMCS_ENUM MSR (48AH) Does Not Properly Report The
Highest Index Value Used For VMCS Encoding
Problem: IA32_VMX_VMCS_ENUM MSR (48AH) bits 9:1 report the highest index value used for
any VMCS encoding.
Due to this erratum, the value 21 is returned in bits 9:1 although
there is a VMCS field whose encoding uses the index value 23.
Implication: Software that uses the value reported in IA32_VMX_VMCS_ENUM[9:1] to read and
write all VMCS fields may omit one field.
Workaround: None identified.
Status: For the steppings affected, see the Summary Tables of Changes.
BV106. DMA Remapping Faults for the Graphics VT-d Unit May Not Properly
Report Type of Faulted Request
Problem: When a fault occurs during DMA remapping of Graphics accesses at the Graphics VT-d
unit, the type of faulted request (read or write) should be reported in bit 126 of the
FRCD_REG register in the remapping hardware memory map register set.
Due to this
erratum, the request type may not be reported correctly.
Implication: Software processing the DMA remapping faults may not be able to determine the type
of faulting graphics device DMA request.
Workaround: None identified.
Status: For the steppings affected, see the Summary Tables of Changes.
BV107. Intel® Trusted Execution Technology ACM Authentication Failure
Problem: SINIT ACM 3rd_gen_i5_i7-SINIT_51.BIN or earlier are revoked and will not launch with
new processor configuration information.
Implication: Due to this erratum, SINIT ACM 3rd_gen_i5_i7-SINIT_51.BIN or earlier will fail to run.
Workaround: It is possible for the BIOS to contain a workaround for this erratum. All Intel® TXT enabled
software must use SINIT ACM 3rd_gen_i5_i7-SINIT_67.BIN or later.
Status: For the steppings affected, see the Summary Tables of Changes.