Intel Q35 Express Computer Hardware User Manual


 
Intel Core 2 Duo Processor and Intel Q35 Express Chipset—Setting Up and Configuring the
Development Kit
Intel
®
Core
TM
2 Duo Processor and Intel
®
Q35 Express Chipset Development Kit
User’s Manual October 2007
34 Order Number: 318476001US
08 Initialize CPU. The BAT test performed on KBC. Auto detection
of KB and MS.
C0 Early CPU Init Start. Disable cache and init local APIC.
C1 Set up boot strap processor information.
C2 Set up boot strap processor for POST.
C5 Enumerate and set up application processors.
C6 Re-enable cache for boot strap processor.
C7 Early CPU Init Exit.
0A Initialize 8042 compatible keyboard controller.
0B Detect PS/2 mouse.
0C Detect keyboard in KBC port.
0E Test and initialization of different input devices. Uncompress all
language, BIOS logo and Silent logo.
13 Early POST initialization of chipset registers.
11 Going to check pressing of <INS>, <END> key during power-
on.
12 To init CMOS if “Init CMOS in every boot” is set or <END> key
is pressed. Going to disable DMA and Interrupt controllers.
13 Video display is disabled and port-B is initialized. Chipset init
about to begin.
24 Uncompress and initialize platform specific BIOS modules.
30 Initialize System Management Interrupt.
2A Initialize different devices through Device Initialization Manager
(DIM).
2C Detect and initialize video adapter with optional ROM.
2E Initialize all output devices.
31 Allocate memory for ADM module. Uncompress and initialize
ADM module.
33 Initialize silent boot mode. Set window to display text
information.
37 Display sign-on message, CPU information, setup message and
OEM specific information.
38 Initialize different devices through DIM.
39 Initialize DMAC-1 and DMAC-2.
3A Initialize RTC date/time.
3B Test and display total memory in system.
3C Mid POST initialization of chipset registers.
40 Detect peripheral devices.
50 Program memory hole or implementation specific adjustments
to system memory.
52 Update CMOS memory size. Allocate memory for extended BIOS
data area.