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Intel
®
Core
TM
2 Duo Processor and Intel
®
Q35 Express Chipset Development Kit
October 2007 User’s Manual
Order Number: 318476001US 35
Setting Up and Configuring the Development Kit—Intel Core 2 Duo Processor and Intel Q35
Express Chipset
60 Initialize NUM-LOCK status and program typematic rate.
75 Initialize INT-13 and prepare for IPL detection.
78 Initialize IPL devices controlled by BIOS and option ROMs.
7A Initialize option RMs.
7C Generate and write contents of ESCD in NVRAM.
84 Log errors encountered during POST.
85 Display errors and prompt for user response.
87 Execute BIOS setup if requested.
8C Late POST chipset register initialization.
8D Build ACPI tables if supported.
8E Program peripheral parameters. Enable/Disable NMI as
selected.
90 Late POST initialization of system management interrupt.
A0 Check for boot password.
A1 Clean-up work needed before boot to OS.
A2 Prepare runtime image for different BIOS modules. Initialize MS
IRQ Routing Table.
A4 Initialize runtime language module.
A7 Display system configuration screen. Initialize CPU for boot,
program MTRRs.
A8 Prepare CPU for boot including final MTRR values.
A9 Wait for user input at configuration display if needed.
AA Uninstall POST INT1CH vector and INT09 vector. De-initialize
ADM module.
AB Prepare BBS for INT19 boot.
AC End of POST initialization of chipset registers.
B1 Save system context for ACPI.
00 Pass control to OS loader via INT19.
61-70 OEM POST error. Reserved for chipset vendors and system
manufacturers.