Intel ZT 4901 Network Router User Manual


 
High Availability Software for the Intel
®
NetStructure
TM
ZT 4901 Technical Product Specification 15
Introduction
Intel’s RH software runs on system master processor boards with bridge mezzanine cards in a
PICMG 2.13 compliant RSS backplane to provide redundant system master functionality. This
allows the failover of control of redundant PCI buses. It provides faster hardware that is PICMG
2.9 and 2.16 compliant. The system makes use of the IPMI infrastructure for fault detection and
correction.
2.2.1 Processor Boards
The Host processor board is a CompactPCI system master processor board, such as the ZT 5524,
that can operate in Owner Mode or Drone Mode, and may operate in Peripheral Mode.
Additionally, it must be able to gracefully transition between modes by coordinating with a
Redundant Host (RH). The processor board must also support hot swap when it is in Drone Mode.
The key elements that allow RSS functionality are shown in Figure 2, “RSS Processor Board Block
Diagram” on page 16 and are described below.
PCI The PCI interface to the backplane. This may be a PCI-to-PCI bridge like
the Intel 21154, or some other PCI interface.
Iso/Term CompactPCI termination and isolation. Isolation is required to ensure
that the PCI interface does not affect the backplane bus segment when
the board interface is in Drone Mode. Termination is required when the
board interface is in Owner Mode. The isolation may be integrated into
the PCI interface device.
Clk The clock generator for the CompactPCI bus segment when the board
interface is in Owner Mode.
CIC The CompactPCI Interface Controller is responsible for coordinating
switchovers.
Arb The bus arbiter for the CompactPCI when the board interface is in Owner
Mode.
HC The Host Controller provides the software accessible registers for
control and status of the CIC.
xMC The IPMI Management Controller may operate as a Baseboard
Management Controller (BMC) or Satellite Management Controller
(SMC). This device is responsible for detecting faults and notifying the
CIC so that it may make the appropriate response. Additionally, the xMC
is responsible for power-on negotiation of bus ownership with a
redundant board.