Intel ZT 4901 Network Router User Manual


 
26 High Availability Software for the Intel
®
NetStructure
TM
ZT 4901 Technical Product Specification
System Management
The next-generation, high-availability architecture provides this system management infrastructure
using IPMI. Through the IPMI API the developer is able to access the status of individual sensors,
various management controllers, and to configure the system to initiate switchovers based on
events or threshold excursions. See Chapter 8, “IPMI API,” for details.
4.1.2 Hot Swap API
A critical feature of any system that claims to be Highly Available is the capability to perform
peripheral insertions and extractions without requiring that the system be powered off. In order to
provide this functionality a kernel level Hot Swap infrastructure should be integrated into the
operating system. This infrastructure allows for dynamic resource allocation for peripheral slot
cards. Given the dynamic nature of a Highly Available platform, the system management needs to
remain aware of the system’s topology. A PICMG 2.12 compliant Hot Swap API accomplishes
this. The Hot Swap API includes functions to return the state and population of the CompactPCI
bus, to simulate unlatching a particular board's hot swap extractor, and to permit software
connection and disconnection. See Chapter 6, “Redundant Host API,” for more information.
4.1.2.1 Slot Control API
Another part of system management is the ability to control individual peripherals cards. Under
normal circumstances in which a system is operating properly, little in the way of card control
needs to be performed. There are events that require actions to be taken to place the peripheral
cards into a known state. It is the responsibility of the slot control driver and the accompanying API
to provide this quiescing and peripheral shutdown functionality. This API provides control at the
card level, as well as providing several functions that allow reporting the status of the peripheral
card’s operational state. See Chapter 9, “Slot Control API,” for more information.
4.2 Baseboard Management Controller Firmware
Enhancements
The HASDK takes advantage of the system master processor board’s capability for board
management provided through its resident Baseboard Management Controller (BMC). The
standard capabilities of the BMC provide a high level of system management. To support RH
functionality, some extensions for bus segment control are added to IPMI v1.5 specification
support. These extensions include:
Fault Configuration
Isolation Strategies
CompactPCI Interface Controller interaction
Non-Volatile Storage of RH Parameters
IPMI RH Channel Commands
4.2.1 Fault Configuration
The BMC handles the following event triggering mechanisms for each entry in its Sensor Data
Record (SDR):
Upper/Lower non-critical threshold