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disable();
se+5,0); /* disable all interrupt */
mask=inportb(A1_8259+1);
0xff ^ (1<<wIrq));
mask=inportb(A1_8259+1);
0xfb); /* IRQ2 */
=0x05;
+0x2a,invert); /* P2C0 = non-inverte input */
-------------------------------------------------------------- */
e=inportb(wBase+7)&0x0f;
now P2C0 change to high */
/* now P2C0 change to low */
1; /* generate a high pulse */
nt_c&0x2)!=0)
{
now P5C0 change to high */
{
}
outportb(wBa
if (wIrq<8)
{
irq
outportb(A1_8259+1,irqmask &
setvect(wIrq+8,irq_service);
}
else
{
irq
outportb(A1_8259+1,irqmask &
irqmask=inportb(A2_8259+1);
0xff ^ (1<<(wIrq-8))); outportb(A2_8259+1,irqmask &
setvect(wIrq-8+0x70,irq_service);
}
vertin
outportb(wBase
/* P5C0 = inverte input */
/* P8C0 = non-inverte input */
/* P11C0 = inverte input */
w_int_state=0x0a; /* P2C0 = Low */ no
/* P5C0 = High */
/* P8C0 = Low */
/* P11C0 = High */
T_L1=CNT_L2=CNT_L3=CNT_L4=0; /* Low_pulse counter */ CN
CNT_H1=CNT_H2=CNT_H3=CNT_H4=0; /* High_pulse counter */
int_num=0;
ase+5,0x0f); /* enable interrupt P2C0 */ outportb(wB
enable(); /* P5C0, P8C0, P11C0 */
}
/*
/* NOTE:1.The hold-time of INT_CHAN_0/1/2/3 must long enough */
/* 2.The ISR must read the interrupt status again to the */
/* active interrupt sources. */
/* 3.The INT_CHAN_0&INT_CHAN_1 can be active at the same time*/
/* -------------------------------------------------------------- */
void interrupt irq_service()
{
t_num++; in
new_int_stat
int_c=new_int_state^now_int_state;
((int_c&0x1)!=0) if
{
if ((new_int_state&0x01)!=0) /*
{
CNT_H1++;
}
else
{
CNT_L1++;
}
invert=invert^
}
if ((i
if ((new_int_state&0x02)!=0) /*
CNT_H2++;
OME-PIO-D96 User Manual (Ver.1.1, Mar/2003) ---- 46