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5.2.2.1 Scan List Queue Programming

The scan list queue must be programmed when the A/D circuit card is idle. Each queue entry

contains two bytes as described above and the integrity of the entry must be guaranteed. (The

scan list queue is write only). The queue should be flushed before writing into it. Refer to the

Auxiliary Control Register section for information on scan list queue reset. The first entry of

the queue should have bit 7 (LSB) set to “1” as the first channel mark. For the remaining

entries, set the bit to “0”. The synchronous sample hold bit (LSB) is not used by DAQP card

and is reserved for expansion cards that support synchronous sample hold.

Example 1

Table 5-10 lists the required queue entries to specify a scan list of three single-ended internal

channels: 0, 12, and 7; with a gain of 2 for channel 0 and a gain of 4 for channels 12 and 7:

Table 5-10. Scan List Queue Programming Example 1

Select channel 7, gain 4

2700

0010 0111 0000 0000

3

Select channel 12, gain 4

2C00

0010 1100 0000 0000

2

Select channel 0, gain 2, 1st entry

entry

1080

0001 0000 1000 0000

1

ExplanationHexBinaryEntry

Example 2

Table 5-10 lists the required queue entries to specify a scan list of 4 differential internal

channels: 2, 1, 6 and 7; with gain of 1 for all channels:

Table 5-11. Scan List Queue Programming Example 2

Select channel 7, gain 1

4700

0100 0111 0000 0000

4

Select channel 6, gain 1

4600

0100 0110 0000 0000

3

Select channel 1, gain 1

4100

0100 0001 0000 0000

2

Select channel 2, gain 1, 1st entry

4280

0100 0010 1000 0000

1

ExplanationHexBinaryEntry

DAQP-208/208H/308 Users Manual 44

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