Renesas M30830T-EPB Switch User Manual


 
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Chapter 5. Specifications
5.1 Specifications
Table 5.1 lists the specifications of the M30830T-EPB.
Table 5.1 Specifications of the M30830T-EPB
PC7501
M30833MJFP/M30833FJFP (100-pin 0.65-mm)
M30833MJGP/M30833FJGP (100-pin 0.5-mm)
M30835MJGP/M30835FJGP (144-pin 0.5-mm)
Planning to support the M32C/81 and 82 Groups
M30835FJGP (two pieces)
Single-chip mode
Memory expansion mode
Microprocessor mode
(1) 512 KB for internal ROM of MCU
(Fixed F80000h - FFFFFFh, maximum operating frequency: 30
MHz, 0 wait)
(2) 4 MB for expansion area (changeable)
(Possible to allocate by 256 KB or 1 MB, maximum operating
frequency: 30 MHz, 1 wait)
30 MHz (Operating voltage: 4.2 to 5.5 V, divide-by-1)
20 MHz (Operating voltage: 3.0 to 3.6 V, divide-by-1)
X
IN
-X
OUT
Internal oscillator circuit board (OSC-3)
Switchable to external oscillator input
X
CIN
-X
COUT
Internal oscillator circuit board (32.768 kHz fixed)
Switchable to external oscillator input
3.0 - 3.6 V, 4.2 - 5.5 V
5 to 35°C (no dew)
-10 to 60°C (no dew)
12 V supplied from AC adapter
For 144-pin 0.5-mm-pitch LQFP (144P6Q-A):
M3T-FLX-144NSD (separately available)
For 100-pin 0.5-mm-pitch LQFP (100P6Q-A):
(1) M30800T-PTC (included) + M3T-100LCC-QSD (separately
available)
(2) M30800T-PTC (included) + M3T-100LCC-DMS (separately
available) + M3T-FLX-100NSD (separately available)
(3) M3T-F160-100NSD (separately available)
For 100-pin 0.65-mm-pitch QFP (100P6S-A):
(1) M30800T-PTC (included) + M3T-100LCC-DMS (separately
available) + M3T-FLX-100NRB (separately available)
(2) M30800T-PTC (included) + M3T-100LCC-DMS (separately
available) + M3T-DUMMY100S (separately available)
(3) M30800T-PTC (included) + M3T-100LCC-DMS (separately
available) + M3T-DIRECT100S (separately available)
For 100-pin LCC socket:
M30800T-PTC (included) + IC61-1004-051 (included)
Emulator
Applicable MCU
Evaluation MCU
Usable mode
Emulation memory
Maximum operating frequency
Clock oscillator
Operating frequency
Operating temperature
Storage temperature
Powe supply to emulator
Connection to target system
(see 3.6 "Connecting the Target
System" on page 34)
RAM: 31 KB
ROM: 512 KB