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AX1500 Motor Controller User’s Manual 151
Register Description
These two registers contain either the measured speed or the measured distance.
Whether speed or distance information is returned depends on the settings contained in
the Mode register described at. This information is returned using the ?p query (see
“Query Analog Inputs” on page 131).
Counter Read/Write Mailbox
Address: *88 - Most Significant Byte
*89
*8A
*8B - Least Significant Byte
Since the counters are 32-bits wide and accesses are 8-bit wide, it would normally take
four separate accesses to fully read or write any of the counters. If the motors are running
and the counter is changing in-between these accesses, inaccurate data will be either read
or written. Therefore a two-step process is implemented for accessing the encoder’s
counters: for loading a new value in the counter, the value must first be loaded in the mail-
box. It is then transferred in a single step using a command. When reading a counter, a
read command is sent to the encoder module which then copies the counter value into the
mailbox. The mailbox system can be used in the same way for reading and writing the des-
tination register.
In practice, reading a counter is done by a single command described in “Read Encoder
Counter” on page 145. This command will perform the steps above and output the
selected counter value.
Writing a user-defined value into a counter or destination register requires that the value be
loaded in the mailbox using the steps defined in “Read / Modify Encoder Module Registers
and Parameters” on page 148, and then that of one of the commands described in “Set/
Reset Encoder Counters and Destination Registers” on page 145 be issued.
Counter 1 and 2
Address: *8C - Most Significant Byte Counter 1
*8D
*8E
*8F - Least Significant Byte
*90 - Most Significant Byte Counter 2
*91
*92
*93 - Least Significant Byte
These two 32-bit (4-bytes) registers are the actual counters. As discussed above, they
should not be accessed directly, as their value may fluctuate between the four accesses
needed to read or write a complete 32-bit counter.
Destination Register 1 and 2
Address: *94 - Most Significant Byte Destination 1
*95
*96
*97 - Least Significant Byte
Address: *98 - Most Significant Byte Destination 2
*99