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RESET and POWER-DOWN S3C8275X/F8275X/C8278X/F8278X/C8274X/F8274X
8-4
Table 8-3. S3C8275X/C8278X/C8274X Set 1, Bank 1 Register Values After RESET
Register Name Mnemonic Address Bit Values After RESET
Dec Hex
7 6 5 4 3 2 1 0
LCD control register LCON 224 E0H 0 0 0 0 0 0
−
0
Watch timer control register WTCON 225 E1H 0 0 0 0 0 0 0 0
Timer A counter TACNT 226 E2H 0 0 0 0 0 0 0 0
Timer B counter TBCNT 227 E3H 0 0 0 0 0 0 0 0
Timer A data register TADATA 228 E4H 1 1 1 1 1 1 1 1
Timer B data register TBDATA 229 E5H 1 1 1 1 1 1 1 1
Timer 1/A control register TACON 230 E6H 0 0 0 0 0 0 0 0
Timer B control register TBCON 231 E7H
−
0 0 0 0 0 0 0
Clock output control register CLOCON 232 E8H
−
− − − − −
00
Port 4 control register (high byte) P4CONH 233 E9H 0 0 0 0 0 0 0 0
Port 4 control register (low byte) P4CONL 234 EAH 0 0 0 0 0 0 0 0
Port 5 control register (high byte) P5CONH 235 EBH 0 0 0 0 0 0 0 0
Port 5 control register (low byte) P5CONL 236 ECH 0 0 0 0 0 0 0 0
Port 6 control register P6CON 237 EDH 0 0 0 0 0 0 0 0
Locations EEH – EFH are not mapped.
Flash memory control register FMCON 240 F0H 0 0 0 0 0
−
−
0
Flash memory user programming enable register FMUSR 241 F1H 0 0 0 0 0 0 0 0
Flash memory sector address register (high byte) FMSECH 242 F2H 0 0 0 0 0 0 0 0
Flash memory sector address register (low byte) FMSECL 243 F3H 0 0 0 0 0 0 0 0
Battery level detector control register BLDCON 244 F4H
−
−
0 0 0 0 0 0
Locations F5H – FFH are not mapped.