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S3C8275X/F8275X/C8278X/F8278X/C8274X/F8274X PRODUCT OVERVIEW
1-3
BLOCK DIAGRAM
544/288 Byte
Register File
16/8/4-Kbyte
ROM
8-Bit Timer/
Counter B
I/O Port 0
8-Bit Timer/
Counter A
I/O Port 2
TAOUT/P0.4
T1CLK/P0.3
TBOUT/P0.5
LCD
Driver
SIO
I/O Port 5
I/O Port 6
BUZ/P0.7
P1.0/SCK
P1.1/SO
P1.2/SI
P6.0-P6.3/
COM0-COM3
P5.0-P5.7/
SEG7-SEG0
nRESET
V
REG
X
OUT
XT
OUT
X
IN
XT
IN
COM0-COM3/P6.0-P6.3
SEG0-SEG7/P5.7-P5.0
SEG8-SEG15/P4.7-P4.0
SEG16-SEG23/P3.7-P3.0
SEG24-SEG30/P2.7-P2.1
16-Bit
Timer/
Counter 1
P0.0/INT0
P0.1/INT1
P0.2/INT2
P0.3/T1CLK
P0.4/TAOUT
P0.5/TBOUT
P0.6/CLKOUT
P0.7/BUZ
I/O Port 1
P1.0/SCK
P1.1/SO
P1.2/SI
P1.3/INT3
P1.4/INT4
P1.5/INT5
P1.6/INT6
P1.7/INT7
I/O Port 3
I/O Port 4
P2.0/SEG31/V
BLDREF
P2.1-P2.7/SEG30-SEG24
P3.0-P3.7/SEG23-SEG16
P4.0-P4.7/SEG15-SEG8
Port I/O and Interrupt Control
SAM88RC CPU
SEG31/P2.0/V
BLDREF
VLC0-VLC2
Watch Timer
Battery Level
Detector
Clock Out
Block
Low Voltage
Reset
Basic Timer
Watchdog
Timer
V
BLDREF
/
P2.0/SEG31
CLKOUT/P0.6
Figure 1-1. Block Diagram