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I/O PORTS S3C8275X/F8275X/C8278X/F8278X/C8274X/F8274X
9-12
Port 2 Control Register, Low Byte (P2CONL)
EBH, Set 1, Bank 0, R/W
.7 .6 .5 .4 .3 .2 .1 .0MSB LSB
P2.3/SEG28
P2CONL bit-pair pin configuration settings:
00
01
10
11 Alternative function (SEG28-SEG31/V
BLDREF
)
P2.2/SEG29 P2.1/SEG30 P2.0/SEG31/V
BLDREF
Input mode
N-channel open-drain output mode
Push-pull output mode
Figure 9-14. Port 2 Low-byte Control Register (P2CONL)
Port 2 Pull-up Control Register (P2PUR)
ECH, Set 1, Bank 0, R/W
.7 .6 .5 .4 .3 .2 .1 .0MSB LSB
P2PUR bit configuration settings:
0
1
Enable pull-up resistor
Disable pull-up resistor
P2.3 P2.2 P2.1 P2.0P2.7 P2.6 P2.5 P2.4
NOTE:
A pull-up resistor of port 2 is automatically disabled when the
corresponding pin is selected as push-pull output or alternative
function.
Figure 9-15. Port 2 Pull-up Control Register (P2PUR)