Filter
Top Products
PCA-6189 User’s Manual 38
3.5.4 DRAM RAS# to CAS# Delay
In order to improve performance, certain space in memory is reserved for
ISA cards. This memory must be mapped into the memory space below
16 MB. The choices are: 3 and 2.
3.5.5 DRAM RAS# Precharge
This controls the idle clocks after issuing a precharge command to
DRAM. You can leave this on the default setting. The choices are: 3 and
2.
3.5.6 DRAM Data Integrity Mode
System can auto-detect the SDRAM module whether the module sup-
ports ECC or not. When using the ECC SDRAM module, users can
choose ECC or non-ECC according to the manual.
3.5.7 System BIOS Cacheable
Selecting Enabled allows caching of the system BIOS ROM at F0000h-
FFFFFh, resulting in better system performance. However, if any pro-
gram writes to this memory area, a system error may occur. The choices
are Enabled and Disabled.
3.5.8 Video Bios Cacheable
Selecting Enabled allows caching of the video BIOS, resulting in better
system performance. However, if any program writes to this memory
area, a system error may occur. The choices are Enabled and Disabled.
3.5.9 Memory Hole At 15M-16M
Enabling this feature reserves 15 MB to 16 MB memory address space
for ISA expansion cards that specifically require this setting. This makes
memory from 15 MB and up unavailable to the system. Expansion cards
can only access memory up to 16 MB. The default setting is Disabled.
3.5.10 Delayed Transaction
This setting allows the chipset’s embedded 32-bit posted write buffer to
support delayed transaction cycles. If the setting is "Enabled," all PCI-to-
ISA writers are buffered and the PCI bus is released after writing to the
buffer. If setting is Disabled, the PCI bus will bypass the write buffer and
write directly to the ISA bus.
3.5.11 Delay Prior to Thermal
This setting controls the length of time to lower the CPU speed when
CPU temperature is too high. The choices are: 4 Min, 8 Min, 16 Min, and
32 Min.