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32 Zeus
IOPS
3.5-Inch Fibre Channel Solid State Drive Product Manual Rev. 1.0
-DRIVE PRESENT
This signal is connected to the ground plane of the drive. The backplane can use this signal to detect
the presence of the drive.
DEV_CTRL_CODE_X
The DEV_CTRL_CODE_2 through DEV_CTRL_CODE_0 signals provide a binary code to the drive
to control functions such as FC link rate, Power Failure Warning (PFW) and Hard Reset. The control
function is either identified by a code or a sequence of codes on the DEV_CTRL_CODE signals.
Table 9 lists the functions and the associated codes that use a decode value on the
DEV_CTRL_CODE signals.
The Hard Reset function uses a sequence of values on the DEV_CTRL_CODE signals. The
sequence is 5, 1, 3, 2, 3, 1 and 5. A drive detecting a valid Hard Reset sequence shall perform the
equivalent of a power-on reset.
4.7K ohm pull-up resistors to 3.3V are provided on the drive for both DEV_CTRL_CODE_2,
DEV_CTRL_CODE_1 and DEV_CTRL_CODE_0 to ensure that each signal is maintained in its high
state unless a low is provided from the backplane.
Note: Please refer to the SFF-8045 Specification for more information.
Table 9. DEV_CTRL_CODE_N Signal Definitions
DEV_CTRL_CODE_N
Link Rate CODE_2 CODE_1 CODE_0
1.0625 GHz 1 1 1
2.1250 GHz 1 1 0
Reserved 101
Reserved 100
Reserved 011
Reserved 010
Reserved 001
Power Failure Warning 0 0 0