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X7DBU/X7DGU User's Manual
FP Power Butt
o
OH/Fan Fail/
PWR Fail/UID LED
1
NIC1 LED
FP Reset Butt
o
2
HDD LED
Power LED
Reset
PWR
Vcc
UID Switch/Vcc
Vcc
Blue_LED_Cathode
(UID)/Vcc
Ground
Ground
1920
Vcc
X
Ground
NMI
X
Vcc
PWR Fail LED
NIC2 LED
JWOR1
COM2
J7
JBT1
JWOL1
JPL1
JPL2
J30
JL1
JOH1
JD1
Fan2
LE1
JF1
FP CTRL
JPW1
J17
LE2
SW1
J11
I2C1
I2C2
JPG1
Rear UID
ES1000
Video CTRL
Intel ESB2
(South Bridge)
USB4
JWD
JK1
USB2/3
J18
SMB
CPU1
JPW3
COM1
VGA
LAN1
LAN2
J28
SXB2: PCI-E x8
SXB1: PCI-E x16
PCI-X 133 MHz
(North Bridge)
Video Memory
X7DBU
J29
Fan4
Fan8
CPU FAN2
Fan3
Fan1
20-Pin Main PWR
JPW2
4-Pin PWR
8-Pin PWR
Fan7
CPU Fan1
PWR SMB
Fan5
Fan6
Buzzer
SP1
J9B2
J9B1
J8B3
J8B2
J8B1
J7B3
J7B2
J7B1
DIMM4B
SGPIO1
SGPIO2
J27
UIO PWR
LAN
CTRL
JLAN2
JLAN1
J15
JCOM1
JKM1
Bank1
I-SATA0
I-SATA1
I-SATA2
I-SATA3
I-SATA4
I-SATA5
BIOS
J22
Floppy
SIMSO
IDE#1
CPU2
JP1
DIMM1A
DIMM1B
DIMM2A
DIMM2B
DIMM3A
DIMM3B
DIMM4A
Battery
Bank2
Bank3
Bank4
KB/MS
USB 0/1
J5
J14
S I/O
Intel 5000
J9
Power LED
The Power LED connection is located
on pins 15 and 16 of JF1. Refer to the
table on the right for pin defi nitions.
NMI Button
The non-maskable interrupt button
header is located on pins 19 and 20
of JF1. Refer to the table on the right
for pin defi nitions.
NMI Button
Pin Defi nitions (JF1)
Pin# Defi nition
19 Control
20 Ground
Power LED
Pin Defi nitions (JF1)
Pin# Defi nition
15 +5V
16 Ground
C. Front Control Panel Pin Defi nitions
A. NMI
B. PWR LED
A
B