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2.3.2.2InitializationtoPLLModefromPLLPowerDown
PLLController
Example2.PLL2FrequencyChangeStepsWhenDDR2MemoryControllerisInReset
ThisexamplediscussesthestepstochangethePLL2frequencywhentheDDR2memorycontrolleris
inreset.NotethattheDDR2memorycontrollerisinresetafterthesedevice-levelglobalresets:
power-onreset,warmreset,maxreset.
1.LeavetheDDR2memorycontrollerinreset.
2.ProgramthePLL2clocksbyfollowingthestepsintheappropriatesection:Section2.3.2.2,
Section2.3.2.3,orSection2.3.2.4.(DiscussioninSection2.3.2explainswhichistheappropriate
subsection).
3.InitializetheDDR2memorycontroller.ThestepsforDDR2memorycontrollerinitializationarefound
intheTMS320C642xDSPDDR2MemoryControllerUser'sGuide(SPRUEM4).
Example3.PLL2FrequencyChangeStepsWhenDDR2MemoryControllerisOutofReset
ThisexamplediscussesthestepstochangethePLL2frequencywhentheDDR2memorycontrolleris
alreadyoutofreset.
1.StopDDR2memorycontrolleraccessesandpurgeanyoutstandingrequests.
2.PuttheDDR2memoryinself-refreshmodeandstoptheDDR2memorycontrollerclock.TheDDR2
memorycontrollerclockshutdownsequenceisintheTMS320C642xDSPDDR2Memory
ControllerUser'sGuide(SPRUEM4).
3.ProgramthePLL2clocksbyfollowingthestepsintheappropriatesection:Section2.3.2.2,
Section2.3.2.3,orSection2.3.2.4.(DiscussioninSection2.3.2explainswhichistheappropriate
subsection).
4.Re-enabletheDDR2memorycontrollerclock.TheDDR2memorycontrollerclockonsequenceisin
theTMS320C642xDSPDDR2MemoryControllerUser'sGuide(SPRUEM4).
IfthePLLispowereddown(PLLPWRDNbitinPLLCTLissetto1),youmustfollowtheprocedurebelow
tochangePLL2frequencies.
1.SelecttheclockmodebyprogrammingtheCLKMODEbitinPLLCTL.
2.BeforechangingthePLLfrequency,switchtoPLLbypassmode:
a.ClearthePLLENSRCbitinPLLCTLto0toallowPLLCTL.PLLENtotakeeffect.
b.ClearthePLLENbitinPLLCTLto0(selectPLLbypassmode).
c.Waitfor4MXIcyclestoensurePLLCswitchestobypassmodeproperly.
3.ClearthePLLRSTbitinPLLCTLto0(resetPLL)
4.SetthePLLDISbitinPLLCTLto1(disablePLLoutput).
5.ClearthePLLPWRDNbitinPLLCTLto0tobringthePLLoutofpower-downmode.
6.ClearthePLLDISbitinPLLCTLto0(enablethePLL)toallowPLLoutputstostarttoggling.Notethat
thePLLCisstillatPLLbypassmode;therefore,thetogglingPLLoutputdoesnotgetpropagatedto
therestofthedevice.
7.WaitforPLLstabilizationtime.Seethedevice-specificdatamanualforPLLstabilizationtime.
18Phase-LockedLoopController(PLLC)SPRUES0B–December2007
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