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Dead-BandSubmoduleRegisters
Table4-13.Dead-BandGeneratorControlRegister(DBCTL)FieldDescriptions
BitsNameValueDescription
15-6ReservedReserved
5-4IN_MODEDeadBandInputModeControl
Bit5controlstheS5switchandbit4controlstheS4switchshowninFigure2-28.
Thisallowsyoutoselecttheinputsourcetothefalling-edgeandrising-edgedelay.
Toproduceclassicaldead-bandwaveformsthedefaultisEPWMxAInisthesourceforboth
fallingandrising-edgedelays.
00EPWMxAIn(fromtheaction-qualifier)isthesourceforbothfalling-edgeandrising-edge
delay.
01EPWMxBIn(fromtheaction-qualifier)isthesourceforrising-edgedelayedsignal.
EPWMxAIn(fromtheaction-qualifier)isthesourceforfalling-edgedelayedsignal.
10EPWMxAIn(fromtheaction-qualifier)isthesourceforrising-edgedelayedsignal.
EPWMxBIn(fromtheaction-qualifier)isthesourceforfalling-edgedelayedsignal.
11EPWMxBIn(fromtheaction-qualifier)isthesourceforbothrising-edgedelayand
falling-edgedelayedsignal.
3-2POLSELPolaritySelectControl
Bit3controlstheS3switchandbit2controlstheS2switchshowninFigure2-28.
Thisallowsyoutoselectivelyinvertoneofthedelayedsignalsbeforeitissentoutofthe
dead-bandsubmodule.
Thefollowingdescriptionscorrespondtoclassicalupper/lowerswitchcontrolasfoundinone
legofadigitalmotorcontrolinverter.
TheseassumethatDBCTL[OUT_MODE]=1,1andDBCTL[IN_MODE]=0,0.Other
enhancedmodesarealsopossible,butnotregardedastypicalusagemodes.
00Activehigh(AH)mode.NeitherEPWMxAnorEPWMxBisinverted(default).
01Activelowcomplementary(ALC)mode.EPWMxAisinverted.
10Activehighcomplementary(AHC).EPWMxBisinverted.
11Activelow(AL)mode.BothEPWMxAandEPWMxBareinverted.
1-0OUT_MODEDead-bandOutputModeControl
Bit1controlstheS1switchandbit0controlstheS0switchshowninFigure2-28.
Thisallowsyoutoselectivelyenableorbypassthedead-bandgenerationforthefalling-edge
andrising-edgedelay.
00Dead-bandgenerationisbypassedforbothoutputsignals.Inthismode,boththeEPWMxA
andEPWMxBoutputsignalsfromtheaction-qualifierarepasseddirectlytothePWM-chopper
submodule.
Inthismode,thePOLSELandIN_MODEbitshavenoeffect.
01Disablerising-edgedelay.TheEPWMxAsignalfromtheaction-qualifierispassedstraight
throughtotheEPWMxAinputofthePWM-choppersubmodule.
Thefalling-edgedelayedsignalisseenonoutputEPWMxB.Theinputsignalforthedelayis
determinedbyDBCTL[IN_MODE].
10Therising-edgedelayedsignalisseenonoutputEPWMxA.Theinputsignalforthedelayis
determinedbyDBCTL[IN_MODE].
Disablefalling-edgedelay.TheEPWMxBsignalfromtheaction-qualifierispassedstraight
throughtotheEPWMxBinputofthePWM-choppersubmodule.
11Dead-bandisfullyenabledforbothrising-edgedelayonoutputEPWMxAandfalling-edge
delayonoutputEPWMxB.TheinputsignalforthedelayisdeterminedbyDBCTL[IN_MODE].
Registers104SPRU791D–November2004–RevisedOctober2007
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